Operator Hardware Realization using FPGA: CMAC Implementation as an Example

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篇名	Operator Hardware Realization using FPGA: CMAC Implementation as an Example
並列篇名	Operator Hardware Realization using FPGA: CMAC Implementation as an Example
作者	Kuan-Yi Lin、Shih-An Lee、Peter Liu
英文摘要	We propose a hardware implementation on a field-programmable gate array (FPGA) of the cerebellar model articulation controller (CMAC) with an integer numeric system. Existing hardware implementations of floating-point processes on FPGAs have utilized the IEEE 754 standard, which introduces complex operations leading to long processing times. For the most complex part of the CMAC, that is, the exponential operator, traditional look-up table methods carry high memory costs. We, therefore, use a Taylor series to realize the exponential operator. Finally, we connect all the modules into the CMAC.
起訖頁	051-060
關鍵詞	CMAC、hardware implementation、integer numeric system
刊名	電腦學刊
期數	202212 (33:6期)
DOI	10.53106/199115992022123306004 複製DOI
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