Dynamic Relocation Cache for Instruction Delivery in Low Power Processor

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篇名	Dynamic Relocation Cache for Instruction Delivery in Low Power Processor
並列篇名	Dynamic Relocation Cache for Instruction Delivery in Low Power Processor
作者	Meng-Rao Tang、Hong-Yin Luo
起訖頁	060-078
關鍵詞	address-mapping、cache、dynamic relocation、low power、processor、address-mapping、cache、dynamic relocation、low power、processor
刊名	電腦學刊
期數	201706 (28:3期)
DOI	10.3966/199115592017062803006 複製DOI
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